PCIe^® (PCI Express^®) PLL & Receiver Test Applications

The need to relieve throughput bottlenecks in computing and communications, together with the development of low cost, high speed CMOS technology, has caused the move to high speed serial buses. PCI Express (PCIe) is aimed at replacing PCI for applications such as interfacing video cards in computing. PCIe has serial data rates (2.5 GT/s, 5.0 GT/s, and 8 GT/s) that are firmly in the microwave arena, requiring significant attention to signal integrity.

SyntheSys engineers actively participate in PCIe standard work groups for the development of PCIe 1.0 and 2.0 tests, as well as the definition of the upcoming PCIe 3.0 base specification.

Testing can be done to two levels; the Base Specification, or the Card Electro-Mechanical (CEM) level. The latter test is a subset of the full base specification used for compliance workshops. Free software automating the signal integrity tests to the CEM 1.0a and 1.1 levels is available to BERTScope users.

Why Choose BERTScope for PCI Express?

• All five jitter sources (2 RJ and 3 SJ) for 5 GT/s CEM testing in one instrument
• Can test with SSC for receiver tolerancing of data clocked architecture
• >20 GHz analog bandwidth for correct amplitude and eye diagram measurements on 8 GT/s transmitters
• Export to StatEye using BERTScope PatternVu option.

Signal Integrity Tests:

Base Specifications 1.0a

Base Specifications 1.1

Base Specifications 2.0

 

PCIe 2.0 Jitter Tolerance Tests - Five Required Jitter Sources & BERTScope Solutions:

1	Calibration Channel with better than 20 dB return loss and 5:1 amplitude ratio	BERTScope Differential ISI Board
2	1.5 MHz to 100 MHz Deterministic Jitter (DJ)	BERTScope's built-in sine wave jitter (SJ)
3	30 kHz DJ simulating the residual of the SSC ('rSSC')	Full SSC is available in the BERTScope. rSSC is triangular with parabolic rounded peaks emulating the phase delta between two copies of SSC having a 20 ns time difference. The residual 77 ps used for Gen2 testing is built into the PCIe Test Bench by BERTScope.
4	1.5 MHz to 100 MHz Random Jitter (RJ)	Integrated source in the PCIe Test Bench by BERTScope
5	10 kHz to 1.5 MHz RJ	Integrated source in the PCIe Test Bench by BERTScope

PCIe 2.0 also specifies the testing of the transmitter PLL loop bandwidth and peaking. The receiver PLL istested by sweeping the jitter magnitude, finding the jitter tolerance versus jitter frequency.

PLL loop bandwidth is accurately tested within 12 seconds using the BERTScope PLL loop bandwidth instrument (a version of our Clock Recovery instrument, which can be upgraded to the CRJ with jitter spectrum capabilities). 

The PLL loop bandwidth tester provides a jitter transfer function (JTF), and phase margin (for stability analysis), in addition to closed loop bandwidth and peaking.

How it works: The PLL instrument produces a 100 MHz reference clock with a 50% duty cycle, amplitude and DC offsets per PCIe specifications. The instrument sweeps the frequency of true sinusoidal phase modulation while measuring the returned magnitude and phase of the same frequency. This provides a stable, single-instrument system with large dynamic range capable of providing useful information beyond the required loop bandwidth and peaking.

Resources

  Information on how BERTScope applies to PCIe tests
  BERTScope mask files for PCIe
  BERTScope pattern files for PCIe
  All PCIe Resource files

Useful Links

	Compliance Base Boards and Compliance Load Boards (designed by Intel) are available from PCI-SIG: http://www.pcisig.com/specifications/order_form
	PCI-SIG, www.pcisig.com

Recommended Products:

PCI Express Test Bench by BERTScope
Comprehensive 2.5 and 5.0 GT/s Add-In Card and Chip Testing Solution for Transmitters and Receivers — Includes all equipment, accessories, and software for comprehensive PCI Express testing.

BERTScope Si 8500C with Option XS
8.5 Gb/s Signal Integrity Analyzer with Stressed Eye, including PCI Express-specific stress elements

BERTScope S 7500B with PCIE Option
7.5 Gb/s Signal Integrity Analyzer with Stressed Eye, including PCIE Option

BERTScope DPP Digital Pre-Emphasis Processor

BERTScope CRJ
Variable Clock Recovery Jitter Spectrum Analyzer

BERTScope PLA PCIe-PLL Phase Lock Loop Analyzer
PCIe Compliance Test Solution

Recommended Accessories:

BERTScope Differential ISI Board
Intersymbol Interference Test Accessory

PCIe 1.0a and 1.1 Test Suite Software (Request by email)

The BERTScope is used by a large number of leading manufacturers as their signal integrity test solution for PCIe at 2.5 GT/s, 5 GT/s, and 8 GT/s. The nearly 25 GHz analog input bandwidth of the BERTScope makes it ideal for amplitude, rise time, jitter, and bit error rate measurements, plus mask tests, while training sequence generation and automatic jitter sweeps facilitate receiver toleranc testing. Our PLL loop bandwidth tester version of the clock recovery instrument (BERTScope PLA) brings accuracy and repeatability to Gen2 measurements. 1.5 MHz step filtered jitter measurements are provided in the jitter spectrum view of the CRJ platform.

Application Literature

• PCI Express 5.0 GT/s Add-In Card Receiver (Base Specification) Testing, Rev. 1.2 • JAN 2009
   
• PCI Express 5.0 GT/s Add-In Card Receiver CEM Testing • DEC 2008
   
• PCI Express^® (Rev 1.1) Test Methodology for PLL Loop Bandwidth Response in Add-in Cards Testing Guide for SyntheSys Research, Inc.'s PLL Analyzer Series BERTScope PLA, CRJ 125A-PCIE, and PLL-PCIE • Revision 1.0 • PCI-SIG • APR 2008
   
• PCI Express^® (Rev 2.0) Test Methodology for PLL Loop Bandwidth Response in Add-in Cards Testing Guide for SyntheSys Research, Inc.'s PLL Analyzer Series BERTScope PLA, CRJ 125A-PCIE, and PLL-PCIE • Revision 1.0 • PCI-SIG • APR 2008
   
• PCI Express 2.5 GT/s (1.1 and 1.0a) Add-In Card Transmitter Testing, Rev. 1.1 • SEPT 2007
   
• PCI Express 2.5 GT/s Add-In Card Receiver Testing, Rev. 1.1 • DEC 2007
   
• PCI Express Transmitter PLL Testing — A Comparison of Methods • SEPT 2007
   

 

To learn more about how BERTScope can meet your testing needs, or to schedule a demonstration in your lab, contact our Sales Engineers.

 

PCI Express and PCIe are registered trademarks of PCI-SIG.