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Posters

Our colorful, informative posters introduce basic principles and applications of foundational techniques in signal integrity testing. They are about testing digital high speed communications electronics, and are intended for electronics engineers who work to verify compliance of their products.

Each poster is approximately 27” x 38” (68.5 x 96.5 cm), printed in full color on glossy, heavyweight paper.

Request poster Click to request a free poster.

Anatomy of Clock Recovery Poster Part 1 Anatomy of Clock Recovery, Part 1

“Clock recovery is a common part of many measurements, whether as part of the test setup of part of the device under test. We're going to look at clock recovery from a practical point of view, with emphasis on how it affects measurements… ”

  • Why is Clock Recovery used?
  • How does Clock Recovery work?
  • Testing a 10 Gb/s Clock Recovery circuit
  • Behavior of a Clock Data Recovery (CDR) circuit
  • Where is Clock Recovery used in measurements?
  • The effect of peaking
  • The effect of transition density and anomalous Clock Recovery behavior

Anatomy of Clock Recovery Poster Part 2 Anatomy of Clock Recovery, Part 2

  • Loop types and orders
  • Standards
  • Spread Spectrum Clocking
  • Stress testing
  • The effects of trigger delay in measurements
  • Clock Scheme Notes (1): Distributed
  • Clock Scheme Notes (2): Clock domains in embedded clock systems

Anatomy of an Electronic Eye Diagram PosterAnatomy of an Eye Diagram *

Exploring Digital Electronic Signal Testing
"Eye diagrams are a very successful way of quickly and intuitively addressing the quality of a digital signal. A properly constructed eye … often shows weaknesses in system design… "

  • What makes up an Eye?
  • What does it show?
  • Eye Diagrams and BER
  • Slicing the Eye
  • Testing transmitters
  • Transmitter Measurements - Poor return loss/poor signal-to-noise ratio/optical measurements/cable loss
  • Testing channels
  • Channel Measurements
    - Intersymbol interference (ISI)/Sinusoidal interference (SI)
    - Sinusoidal Jitter (SJ) / Random Jitter (RJ) / Bounded Uncorrelated Jitter (BUJ)
  • Jitter Measurements - How deep is enough?
  • Which standards used Stressed Eye?

PLEASE NOTE: Our Eye Diagram poster depicts the electronic eye diagrams used by engineers to test digital signals. It has absolutely nothing to do with an organic eye.



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